# What is the fastest way to decode the FAST protocol for market data?

What kind of technology are people using these days for decoding FAST? Can FPGA be used in that area?

• As I'm an FPGA guy who is not familiar with the low-level details of this application, could you provide a pointer to a specification for "FAST" please? – Martin Thompson Oct 13 '14 at 15:37

These guys (OCIWEB) are the experts in the FAST world. They may have a definite answer for you (given your specifications: platforms, environments, requirements, compatibility with your trading systems, etc.)

Yes, it's definitely possible to implement FAST decoding on an FPGA.

An FPGA will decode with lower latency than a software decode even though the CPU might be running 10x higher clock rate than the FPGA, with the added benefit of deterministic latency.

When you include the time for ingress from the wire to decoded output an FPGA will be significantly faster than anything else available (assuming nobody has fabbed an ASIC).

We have developed a very fast FAST decoder in Java (CoralFIX) that reads the XML templates from the exchanges and spills out Java code to parse the FAST bits. That way you do not need to use recursion to parse repeating groups, which kills performance. It also produces zero garbage and delivers a lightweight and ready-to-use FixMessage with a super-intuitive API. A complete example can be seen in this article.

I have never seen anyone using FPGA successfully to decode FAST and I would also be interested in hearing about any success cases.

Disclaimer: I am one of the developers of CoralFIX.

• Thats great. Do you have anything similar for python? – Unknown Coder Oct 15 '14 at 21:39